失效分析 赵工 半导体工程师 2023-02-11 08:37 发表于北京
外延层是在晶圆的基础上,经过外延工艺生长出特定单晶薄膜,衬底晶圆和外延薄膜合称外延片。其中在导电型碳化硅衬底上生长碳化硅外...
[{"attributes":{"color":"var(--weui-FG-2)"},"insert":"失效分析 赵工"},{"insert":" "},{"attributes":{"color":"#576b95"},"insert":"半导体工程师"},{"insert":" "},{"attributes":{"color":"var(--weui-FG-2)"},"insert":"2023-02-11 08:37"},{"insert":" "},{"attributes":{"color":"var(--weui-FG-2)"},"insert":"发表于北京"},{"insert":"\n"},{"insert":{"image":"https://files.eteforum.com/202302/080332f40f13fb33.png"}},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"\t外延层是在晶圆的基础上,经过外延工艺生长出特定单晶薄膜,衬底晶圆和外延薄膜合称外延片。其中在导电型碳化硅衬底上生长碳化硅外延层制得碳化硅同质外延片,可进一步制成肖特基二极管、MOSFET、 IGBT 等功率器件,其中应用最多的是4H-SiC 型衬底。"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"\t由于碳化硅功率器件与传统硅功率器件制作工艺不同,不能直接制作在碳化硅单晶材料上,必须在导通型单晶衬底上额外生长高质量的外延材料,并在外延层上制造各类器件,所以外延的质量对器件的性能是影响非常大。不同的功率器,它的性能的提高也对外延层的厚度、掺杂浓度以及缺陷提出了更高要求。"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":{"image":"https://files.eteforum.com/202302/cfe17b83f0887993.png"}},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"图1.单极型器件外延层的掺杂浓度和厚度"},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"与阻断电压关系曲线"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"碳化硅外延层的制备方法主要有:蒸发生长法;液相外延生长(LPE);分子束外延生长(MBE);化学气相沉积(CVD)。这里对这几种制备方法做了一个基本的总结,见表1。化学气相沉积(CVD)法是目前工厂大批量生产用的主要方法。"},{"attributes":{"align":"justify"},"insert":"\n\n\n"},{"insert":"制备方法 "},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"工艺的优点 "},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"工艺的缺点"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"液相外延生长"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"(LPE)"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"设备需求简单并且成本较低的生长方法。"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"很难控制好外延层的表面形貌。设备不能同时外延多片晶圆,限制了批量生产。"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"分子束外延生长(MBE)"},{"attributes":{"align":"justify"},"insert":"\n\n\n"},{"insert":"可以在低生长温度下生长不同的 SiC 晶型外延层"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"设备真空要求度很高,成本高昂。生长外延层速率慢"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"化学气相沉积(CVD)"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"工厂批量生产最主要的方法。生长厚外延层时能够对生长速率精确控制"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"SiC 外延层仍然存在各种缺陷,从而对器件特性造成影响,所以针对 SiC 的外延生长工艺需要进行不断的优化"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"蒸发生长法"},{"attributes":{"align":"justify"},"insert":"\n\n\n"},{"insert":"使用和SiC拉晶同样的设备,工艺和拉晶稍微有区别。设备成熟,成本低"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"SiC 的蒸发不均匀,很难利用其蒸发生长出较高质量的外延层"},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"表1. 外延层主要制备方法的比较"},{"attributes":{"align":"justify"},"insert":"\n\n\n"},{"insert":"在有一定倾斜角度的偏轴{0001}衬底上,如图2(b)示意图,台阶面的密度很大而且台阶面很小,晶体成核不容易在台阶面上发生,多发生在台阶的并入点出,这里只存在一种成核键位。所以外延层可以完美地复制衬底的堆垛次序,消除多型体共存的问题。"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":{"image":"https://files.eteforum.com/202302/2e703f6b41efd4e2.png"}},{"attributes":{"align":"justify"},"insert":"\n\n"},{"attributes":{"bold":true},"insert":"图2. 4H-SiC台阶控制外延法的物理过程示意图"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":{"image":"https://files.eteforum.com/202302/19fab718b1d863a4.png"}},{"attributes":{"align":"justify"},"insert":"\n\n"},{"attributes":{"bold":true},"insert":"图3. 4H-SiC台阶控制外延法CVD生长临界条件"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":{"image":"https://files.eteforum.com/202302/399b34405ec6c5c4.png"}},{"attributes":{"align":"justify"},"insert":"\n\n"},{"attributes":{"bold":true},"insert":"图4. 4H-SiC外延中不同硅源下的生长速率比较"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"insert":"目前在中低压应用领域(比如1200伏器件),碳化硅外延的技术相对成熟。它的厚度均匀性、掺杂浓度均匀性以及缺陷分布可以做到相对较优的水平,基本可以满足中低压 SBD、MOS、JBS 等器件需求。"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"但在高压领域,目前外延片需要攻克的难关还很多。比如10000伏的器件需要的外延层厚度为100μm左右,该外延层的厚度和掺杂浓度均匀性比低压器件的外延层差很多,尤其是掺杂浓度的均匀性,同时它的三角缺陷也破坏了器件的整体性能。在高压应用领域,器件的类型趋向于使用双极器件,对外延层的的少子寿命要求比较高,也需要优化工艺来提高少子寿命。"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"当前国内外延主要以 4 英寸和 6 英寸为主,大尺寸碳化硅外延片占比逐年递增。碳化硅外延尺寸主要受制于碳化硅衬底尺寸,当前 6 英寸碳化硅衬底已经实现商用,因此碳化硅衬底外延也逐渐从 4 英寸向 6 英寸过渡。"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"随着碳化硅衬底制备技术的提升及产能扩张,碳化硅衬底价格正在逐步降低。在外延片价格构成中,衬底占据了外延 50%以上的成本,随着衬底价格的下降,碳化硅外延价格也有望降低。"},{"attributes":{"align":"justify"},"insert":"\n\n"},{"attributes":{"bold":true},"insert":"参考文献:"},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"[1] Tsunenobu Kimoto, James A. Cooper, Fundamentalsof Silicon Carbide Technology: Growth, Characterization, Devices, andApplications."},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"[2] Ueda,T., Nishino, H. and Matsunami, H. (1990) Crystal growth of SiC bystep-controlled epitaxy. J. Crystal Growth, 104, 695."},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"[3] Tsunenobu Kimoto, Bulk and epitaxialgrowth of silicon carbide. Progress in Crystal Growth and Characterization ofMaterials (2016)"},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"[4] F. LaVia etc., SiC-4H epitaxial layer growth by trichlorosilane (TCS) as siliconprecursor at very high growth rate. International Conference on Silicon Carbideand Related Materials 2007"},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"bold":true},"insert":"来源:集成电路前沿"},{"attributes":{"align":"justify"},"insert":"\n"},{"attributes":{"color":"var(--weui-FG-0)"},"insert":"半导体工程师"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"半导体经验分享,半导体成果交流,半导体信息发布。半导体行业动态,半导体从业者职业规划,芯片工程师成长历程。"},{"attributes":{"align":"justify"},"insert":"\n"},{"insert":"\n"}]
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发表于 2023-02-11 08:52
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